| 000 | 01134nam a2200241 a 4500 | ||
|---|---|---|---|
| 003 | AR-LpUFIB | ||
| 005 | 20250311170141.0 | ||
| 008 | 230201s1993 xxua r 000 0 eng d | ||
| 020 | _a0139530010 | ||
| 024 | 8 |
_aDIF-M468 _b471 _zDIF000471 |
|
| 040 |
_aAR-LpUFIB _bspa _cAR-LpUFIB |
||
| 100 | 1 | _aHinton, Jeremy | |
| 245 | 1 | 0 | _aTransputer hardware and system design |
| 250 | _a1st ed. | ||
| 260 |
_aNueva York : _b[S.n.], _c1993 |
||
| 300 |
_ax, 286 p. : _bil. ; _c23 cm. |
||
| 500 | _aIncluye glosario y bibliografía. -- | ||
| 505 | 0 | _a Transputer architecture -- The two-cycle memory interface -- Designing with the two-cycle memory interface -- The three-cycle programmable memory interface -- Designing with the programmable three-cycle memory interface -- Transputer system interconnection -- System testing and debugging -- The T9000 second-generation transputer -- App. A. Instruction set overview -- B. Transputer versions -- C. PAL design equations -- E. Extracts from device data sheets -- F. Example programs. | |
| 650 | 4 | _aTRANSPUTERS | |
| 650 | 4 | _aPROCESAMIENTO PARALELO | |
| 700 | 1 | _aPinder, Alan | |
| 942 | _cBK | ||
| 999 |
_c50458 _d50458 |
||